Dead DRO

[Steve RowbothamParticipant @steverowbotham77083]

Thanks for the offer of the data sheet Joseph but as you say not really of use without the CPU running. I too find it odd for the processor to die at this stage of the ‘bathtub’ curve, it has been in use almost daily for about 3 years so way beyond infant mortality but nowhere near end of life – my only residual doubt is the oscillator. Whilst you suggested the oscillator looked fine based on the AC coupled waveform I posted a few posts back, the fact is that both OSC pins have a bias of 1.6V, with a 0.22V pk-pk 8MHz on OSC OUT and 0.36V pk-pk 8MHz on OSC IN – is this OK to drive the CPU clock?

[Joseph Noci 1Participant @josephnoci1]

Yes, those levels are fine – Assuming your scope probe is a decent one, and on X10, then the probe capacitance is around 10 to 12pf. The caps on the crystal ( one on each leg, to gnd) are generally between 10pf and 22pf. The oscillator circuit is typically a CMOS inverter, biased to midpoint and at a very high impedance – 100’s of Kohm at least and so itching to oscillate. That midpoint bias is what you are measuring in DC. The AC levels – you have a high impedance gate, a cap on the input and output to ground and then you add another – the scope probe, so the load impedance is now halved ( or so) and so the AC voltage drops a lot – so what you see is good!

If the scope probe is a 100Mhz ‘cheapie’ then its even worse…

[Steve Rowbotham]

On Steve Rowbotham Said:

Whilst you [Joe] suggested the oscillator looked fine based on the AC coupled waveform I posted a few posts back, the fact is that both OSC pins have a bias of 1.6V, with a 0.22V pk-pk 8MHz on OSC OUT and 0.36V pk-pk 8MHz on OSC IN – is this OK to drive the CPU clock?

Almost certainly yes.

Building on Joe’s answer, the crystal doesn’t produce a signal on it’s own, it’s only the frequency determining part of an oscillator circuit.  A transistor or logic gate inside the chip provides the power.   A circuit like this example, other configurations available:

The computer’s clock is driven by the output of inverter U1, not by the crystal. The output in this diagram is labelled ‘To INT0’.   Although the oscillator’s output will be close to a square waveform, it’s usual to clean it up and buffer the oscillator by feeding the signal through a second inverter.

U1, Rf and Rs are inside the chip.  Only C1, X1 and C2 are outside on the printed circuit board.  That the crystal has a signal on it at all indicates the oscillator is running, therefore the crystal isn’t the problem.

Dave

 

[Steve RowbothamParticipant @steverowbotham77083]

Thanks Joseph and Dave for your very clear explanations. So if the crystal is good, power is going to where it should, there are no obvious physical problems and there is no life anywhere on the board it does sadly look like the CPU chip itself has failed. As has been suggested previously a potential likely cause is mains bourne transients. Interestingly I plug all of my computing devices into spike and surge protected extension sockets, but i didn’t with my DROs – I think I will in future. Thanks to all contributors to this thread which has been most instructive, hopefully of help to others facing similar issues in the future. Now back to milling after this little excursion.

[Robert Atkinson 2Participant @robertatkinson2]

On the levels shown on the ‘scope. You have the probe type set on the ‘scope to x1. Most scope probes are divider types with 10:1 ratio. Unless you “tell” tha ‘scope this by selecting x10 on the scope the readings will be 1/10  of the actual values. the 2.2V and 3.3V you are seeing, assuming a x10 probe, are correct.

Robert.

[Steve RowbothamParticipant @steverowbotham77083]

Robert, both scope & probe were set to x1 for the below trace. Scaling is set to 0.5V per div and 0v is set at the centre line, so you can see the 0.35V pk-pk oscillation on 1.6V DC bias. The oscillation amplitude is small, hence why I questioned if OK.

 

[Robert Atkinson 2Participant @robertatkinson2]

Try setting the probe to x10. This reduces the electrical loading on the circuit.
350mV is too low The calculated voltages shown on the ‘scope don’t make sense. The RMS value is less than the pk-pk.

Robert.

[Steve RowbothamParticipant @steverowbotham77083]

Robert, this is the result with x10 (on scope & probe), Vpp increased to 600mV.

[Robert Atkinson 2Participant @robertatkinson2]

That still seem a bit low.

What is the signal on the other pin connected to the crystal.

Robert.

[Steve RowbothamParticipant @steverowbotham77083]

Robert, here are Osc in and Osc out as measured today, for some reason the DC bias is higher today (no change in set-up) as is the oscillation amplitude. The frequency was moving around a little also as you can see in the traces. Still no sign of life.

[Joseph Noci 1Participant @josephnoci1]

Steve – nothing wrong with your signals or levels. I suspect the ‘lower’ than normal per Roberts definitions is a trait of your ‘scope and probes – I recognise that scope – absolute voltage levels are not precise…If the probes are the set that came with that scope, they do add to the loss in signal levels.

Here are some scope captures with HP 500Mhz probes with a probe capacitance of 7pf, scope input impedance in x10 = 1meg ohm.

traces are in x10 and x1 modes, on a stm32f401 running @ 25MHz.

Left images are on pin 5 (oscIN), right on pin 6 (oscOUT)

Top pair are x1, bottom are x10

The Y1 cursor is more or less in the centre of the AC waveform, and the DC offset is typically 1.75volts.

For the x1 traces – oscIN = 120mv pp and oscOUT = 50mv pp.

for the x10 traces – oscIN = 800mv pp and oscOUT = 400mv pp.

These sorts of voltage are very typical of most general purpose microprocessors. Even the ATMEL-328p on the arduino mini boards shows similar waveform levels.

[Steve RowbothamParticipant @steverowbotham77083]

Thanks for this Joseph, very useful reference info for those that follow, and yes the probe is the one that came with the device. Time to buy a new DRO readout, this time to be powered from a spike & surge protected mains supply.

[Joseph Noci 1Participant @josephnoci1]

One last possibility..The Boot0 and Boot1 pins are sampled by the CPU at reset and the pattern determines the boot mode – boot from Flash ( where the DRO code sits), or boot from ram, etc, but also to boot into program mode, ie, with an attached JTAG programmer, it would boot into a mode permitting the flash code to be programmed.

Boot0 must be LOW to boot from flash and while low, the Boot1 level is irrelevant.

Boot0 = pin 44 –  Boot0 should be logic low , Boot1 is don’t care, so ignore it (Boot1 = pin 20 )

These pins, or at least boot0, would go to a programming socket or array of pads for on-board programming, so maybe there is something pulling the pin high…

 

[SillyOldDufferModerator @sillyoldduffer]

Again building on Joe’s comments, I looked at the CPU pin-out to see which, if any, pins could stop the CPU.  Only 4, I think, NRST, OSC-CIN OSC-COUT, and BOOT0.  All discussed already.  We know OSC-CIN OSC-COUT are OK.    A fault on NRST would have the CPU permanently resetting itself, never doing anything useful.  A fault on BOOT0, as Joe describes, would have the CPU trying to boot from the wrong memory, again never starting.

Power failure is off the agenda I think.  The chip has 4 power feeds so plenty of redundancy.

A diagram in the datasheet shows how complicated the clock is.  ST describe it as a ‘clock tree’.

I’ve red-ringed the oscillator but it’s only the beginning!  The 8Mhz crystal oscillator is multiplied by a Phase Locked Loop to produce the actual clock at up to 72MHz.   Thus a fault in the PLL would kill the CPU, and, because it’s buried inside, there is no way of fixing it.   Cure: replace CPU, probably cheaper to replace the whole board.

Many reasons why a chip might fail prematurely.

Manufacturing Faults.  They’re made by growing a giant ultra-pure crystal which is carefully doped to semi-conduct.  The chemistry is high-tech.   Then the crystal is mechanically cut into extremely thin slices, that are carefully polished, zero dirt.  Another high-tech process.   The slices are masked and photographically etched with hundreds of CPUs on each slice, accuracy in the nanometre region.  Yet another high-tech process!  Then individual CPUs are cut from the slice and mounted in a chip with wires spot-welded to the pins with micrometre precision.  More high tech.

Only at this point can the chip be tested. All being well, each of those high tech production stages will be ‘good enough’.  In practice, a proportion will be faulty.  And some will be faulty in a way that might fail years later – cracks, impurities causing corrosion etc.

Hot chips in a circuit don’t last long, especially if they are corroding inside due to a manufacturing fault.

Solar radiation: as the chip is tightly packed with components, they can be damaged by high-energy particles.  The same particles can cause cancer by crashing through our DNA, so cells replicate incorrectly.  Rare, but it happens.

Pins soaked by condensation is more likely.  Condensation is far from pure, especially in a grubby workshop. It’s acid, oxygenated, dirty and conductive.  If all the pins are shorted together and/or to earth by condensation, untold damage can be done inside the chip.

Spikes on the mains aren’t unusual.  Static electricity very unlikely, but…

There are other possibilities.

All this adds up in my mind to, ‘if it ain’t an easy obvious fix, replace the board’.

Dave

[CirclipParticipant @circlip]

Yet another victim of the throw away technowleggy, too expensive to repair society. If you do locate and are able to buy the ded bit, we then have to revert to brain surgery to replace it.

Regards  Ian.

[Steve RowbothamParticipant @steverowbotham77083]

I am officially banned from the workshop on the day of rest, will see if I can sneak in later to look at BOOT0.

Gone are the days of plugging the processor into a DIL socket as with my Tangerine or BBC computers, no way on earth I could replace the SMT chip on this board – I have searched for a replacement PCB (Ditron DROL-V1 20180718) without any success thus far.

[Steve RowbothamParticipant @steverowbotham77083]

Joseph, thanks for the suggestion, but BOOT 0 = Lo 🙁

[Joseph Noci 1Participant @josephnoci1]

Buggerit, as they say…

[howardbParticipant @howardb]

As mentioned before, I use generic chinese DRO scales and computer readout.

On the back of my DRO computer enclosure is a prominent brass terminal – not assigned to any function, either by symbols near it or by the extremely comprehensive installation/operating manual in english.

I can only assume that it is an earth terminal, but for what purpose?

The LNE supply contains an earth to a metre long earth spike in the garden, I know, I installed it to “consuel” approved french domestic electrical standards when I wired the workshop.

French electrics to consuel do not bond neutral to the earth at the domestic consumer’s tableau (dis board) or anywhere else, except at the grid origin (power station or transformer so we are told)

The tableau at the workshop from the three phase barn supply ( phase to neutral 230 v) is protected by a 30ma ELCB and the individual power and lighting circuits by miniature 16 Amp/10 amp CB’s.

Where should this spare earth terminal be connected to?

Bonded to the frame of  the machine and commoned to the LNE line earth? Or both?

The machine frame is already bonded to the LNE – I checked when I received the machine.

(NB – French domestic electrics are protected by double pole breakers)

 

[SillyOldDufferModerator @sillyoldduffer]

The brass earth terminal is almost certainly an EMC earth, not a mains safety earth.   It’s purpose is to shield the electronics, done by grounding internal metal shielding by the shortest possible route to a separate earth.

Using the mains earth for EMC is bad practice because the wiring runs all round the house in parallel with live and neutral.  At EMC frequencies:

• the earth wire is capacitively and inductively coupled to the live and neutral wires, so outgoing muck is transferred into them, not good!  At the same time incoming muck on Live and Neutral is transferred into the machine through the EMC earth.
• the mains earth and the machine are so distant that the earth wire acts an aerial, broadcasting muck rather grounding it.
• If either of the above occur, better to disconnect it.

Bottom line, don’t mix radio and electric supply earths!  If an EMC earthing terminal is used, connect it to a nearby radio earth.  A spike is the bare minimum. Supply earths don’t need to be particularly good, a few ohms at DC / 50Hz AC is acceptable.  Radio earths are in a different league, ideally much lower resistance, and spread over a large area near the surface to sink high frequencies.  As a good radio earth is a lot of bother, EMC earth terminals are often left disconnected, maybe unwisely!

When a radio earth is installed check it doesn’t conflict with that provided by electricity supply company.  The rules vary widely!  French methods differ from the UK, and the US is different again.   When in Rome…

Dave

 

[howardbParticipant @howardb]

When a radio earth is installed check it doesn’t conflict with that provided by electricity supply company.  

Perhaps I didn’t make it clear, you don’t get an earth from your power company in France, the grid distribution system is TT.

The LNE supply (to the workshop) contains an earth to a metre long earth spike in the garden,

Our approved house electrics are earthed by being connected to a cast iron water main under the road outside, frowned upon nowadays but functional.

[MacolmParticipant @macolm]

“Bonded to the frame of the machine…”

I think that is what it is for, to make the DRO and the machine as EMC equi-potential as possible. Keep it short and direct to the main casting.

[Macolm]

On Macolm Said:

“Bonded to the frame of the machine…”

I think that is what it is for, to make the DRO and the machine as EMC equi-potential as possible. Keep it short and direct to the main casting.

As I have explained, the safety earth on the incoming electric feed to the machine is connected only to an earth spike, so that would make sense.

To create an EMC earth to another spike just for that electronic panel would be a PITA.

So thanks for that!

[Author]

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